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The fetch–decode–execute cycle

IGCSE Computer Science 0478 · Chapter 3.1, The FDE cycle · 5-minute lecture

The teaching part (2 min) is free to watch. A free account opens the whole lecture: 5 practice questions, 1 real past-paper question with the answer explained, the mistakes that lose marks, the full-marks tip, a one-card summary and a quick quiz.

What this lecture covers

  1. Three steps, billions of times
  2. The three stages
  3. The fetch stage, in a picture
  4. Fetch, steps one and two
  5. Fetch, steps three to five
  6. Decode
  7. Execute
  8. Following one fetch
Read the transcript of the teaching part

Last time

Before we start: last time, in The CPU and the Von Neumann architecture, you learned these points. Here they are again on one card. Keep them in mind, because today builds on them.

Three steps, billions of times

Every instruction a computer runs goes through the same three steps. Fetch it from memory, decode it, then execute it. Then the cycle starts again, billions of times a second, for as long as the computer is on.

The three stages

Fetch: the next instruction is copied from memory into the CPU. Decode: the control unit works out what the instruction means. Execute: the instruction is carried out, often by the ALU.

The fetch stage, in a picture

Here is the fetch stage. Follow the red numbers: one to six.

Fetch, steps one and two

Step one: the address in the program counter is copied into the memory address register. Step two: that address is sent along the address bus to RAM. At the same time, the control unit sends a read signal along the control bus.

Fetch, steps three to five

Step three: the instruction at that address comes back along the data bus, into the memory data register. Step four: the instruction is copied from the MDR into the current instruction register. Step five: the program counter goes up by one, so it points to the next instruction.

Decode

Step six: the instruction in the CIR goes to the control unit to be decoded. The control unit uses the instruction set to work out what it means. It splits it into the opcode, what to do, and the operand, the data or address to use.

Execute

Finally the control unit sends signals so the instruction is carried out. For an add, the ALU adds, and the result goes into the accumulator. For a store, the value is written back to memory. Then the cycle begins again.

Following one fetch

Let us follow one fetch with numbers. The program counter holds fifty-six. Fifty-six is copied to the MAR, and the instruction at address fifty-six, STO 11, arrives in the MDR, then the CIR. Then the program counter becomes fifty-seven.

Chapter 3.1: The FDE cycle

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